1. Field of the Invention
The present invention relates to an integrated circuit wafer processing system, and more particularly, to a multiple chamber semiconductor wafer processing system having multiple process chambers.
2. Description of the Background Art
A multiple chamber semiconductor wafer processing system (known as a cluster tool) that is capable of performing multiple processes sequentially and simultaneously on workpieces, such as semiconductor wafers, is shown in U.S. Pat. No. 4,951,601 issued to Maydan, et al. (Maydan I) and U.S. Pat. No. 5,292,393 also issued to Maydan, et al. (Maydan II), the disclosures of which are incorporated herein by reference.
The cluster tools described in Maydan I and Maydan II are basically an integrated vacuum processing system which includes one or more load lock chambers, a transfer chamber and a plurality of vacuum processing chambers communicating with the load lock and transfer chambers through selectively closeable slits in each chamber. Each of the processing chambers can be adapted to perform one or more integrated circuit processes such as chemical vapor deposition, physical vapor deposition, etch processes and rapid thermal annealing of one or more wafers positioned within the chamber. The load lock chamber incorporates an external wafer elevator which is adapted for positioning wafers adjacent a load lock chamber entrance and an internal elevator which is adapted for moving wafers to a position adjacent the load lock chamber exit or transfer position.
A centrally located wafer transfer mechanism is mounted within the transfer chamber and includes a generally horizontal wafer holding blade. The wafer transfer mechanism effects rotation, extension and retraction of the blade to selectively position the blade at the external elevator, internal elevator, and the processing chambers.
In a normal processing mode, a process controller transfers the wafers from slots in transport cassettes on the external elevator to holding plates of the internal elevator through an entrance in one of the load locks. After the cluster tool has been loaded with wafers, the entrance to the load lock is sealed. The load lock, the transfer chamber and the process chambers are then pumped down to a processing vacuum level. A real time automatic process sequencer is activated to move a first wafer to a process chamber, close its entrance and begin its processing, move a second wafer to a process chamber, close its entrance and begin its processing, and so on. A multiple chamber, continuous sequential process for multiple wafers is thereby provided by scheduling the routing of the wafers between the process chambers while the cluster tool is closed and under vacuum. When processing of a wafer is completed, it is normally returned to a particular plate on the internal elevator until processing of all wafers in a particular lot are completed and returned. The cluster tool is then opened to the atmosphere to unload the wafers to the transport cassettes on the external elevator.
The chemical process regulation and control of the elements of the multiple chamber processing system are provided by a real time multi-tasking control program which permits interactive user input and system supervision. In general, a sequencer task module reads a wafer order list which contains the identification and processing recipe, or sequence, for each wafer on the internal elevator holding plates and schedules the transfer of the wafers among the processing chambers and the process chemistries which occur therein.
Each wafer is processed in order from the wafer order list with one following the other when the process chambers in the wafer's recipe sequence become available. While this works well in theory, on some occasions, a wafer will become "deadlocked" in the processing sequence. This usually happens when the processing recipe for a particular wafer includes a short process step followed by a much longer process step. The shorter process step is scheduled and completed relatively rapidly, but when the transfer to the processing chamber for the longer process step is attempted, the wafer is blocked by the destination chamber being in a "busy" or processing mode for a similar-wafer ahead of it. When this happens, because of the length of the longer process, both chambers (source and destination) in actuality become "busy" or unavailable for further processing for the length of the longer process. The wafer in the source chamber is literally deadlocked waiting for the wafer's destination chamber to become available.
This also happens for inherently shorter processes such as the orientation process. The orientation process can be performed relative quickly, but then the wafer many times waits in the orientation chamber for the next process chamber in the process sequence to become available. This blocks use of the orientation chamber for other wafers which could be preoriented, and then processed regularly when the next process chamber in their process sequence becomes available. This preorientation would save significant time later in subsequent steps in their process sequences.
Therefore, a need exists in the art for a method and apparatus that reschedules system resources to reduce or avoid deadlocked situations.